Commercial Extended Programmable Logic Devices (PLD) 66

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Packing Method	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
GAL22LV10C-10LJ	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	3.6 V		CMOS	22	PAL-TYPE	3.3		3.3 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	3 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin/Lead (Sn85Pb15)	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No	Register Preload; Power-Up Reset	e0	71 MHz		10		11.5062 mm		10
GAL20V8B-15QPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	15 ns	No	5.25 V		CMOS	20	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	64	2.54 mm	75 °C (167 °F)	12 Dedicated Inputs, 8 I/O	12	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24		5.334 mm	7.62 mm	No		e3	45.5 MHz		8	260 °C (500 °F)	31.75 mm		8
GAL22V10D-10LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	83.3 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-10QJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	83.3 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-10QPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	10 ns	No	5.25 V		CMOS	22	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24		5.334 mm	7.62 mm	No		e3	83.3 MHz		10		31.75 mm		10
GAL22V10D-15LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	55.5 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-15LPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	15 ns	No	5.25 V		CMOS	22	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24	1	5.334 mm	7.62 mm	No		e3	55.5 MHz	30 s	10	260 °C (500 °F)	31.75 mm		10
GAL22V10D-15QPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	15 ns	No	5.25 V	10	CMOS	22	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices	No	Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24	1	5.334 mm	7.62 mm	No		e3	55.5 MHz		10		31.75 mm	No	10
GAL22V10D-25LPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	25 ns	No	5.25 V		CMOS	22	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24	1	5.334 mm	7.62 mm	No		e3	33.3 MHz		10		31.75 mm		10
GAL22V10D-25QJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	33.3 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-25QPN	Lattice Semiconductor	EE PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	25 ns	No	5.25 V		CMOS	22	PAL-TYPE	5		5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Dual	R-PDIP-T24	1	5.334 mm	7.62 mm	No		e3	33.3 MHz		10		31.75 mm		10
GAL22V10D-4LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	4 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	167 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-5LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	5 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	142.8 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL22V10D-7LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	7.5 ns	Yes	5.25 V		CMOS	22	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No		e3	111 MHz	40 s	10	245 °C (473 °F)	11.5062 mm		10
GAL20V8B-15LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns	Yes	5.25 V		CMOS	20	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	64	1.27 mm	75 °C (167 °F)	12 Dedicated Inputs, 8 I/O	12	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No	Register Preload; Power-Up Reset	e3	45.5 MHz	40 s	8	245 °C (473 °F)	11.5062 mm		8
GAL20V8B-25LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.25 V		CMOS	20	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	64	1.27 mm	75 °C (167 °F)	12 Dedicated Inputs, 8 I/O	12	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No	Register Preload; Power-Up Reset	e3	37 MHz	40 s	8	245 °C (473 °F)	11.5062 mm		8
GAL20V8C-10LJN	Lattice Semiconductor	EE PLD	Commercial Extended	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V		CMOS	20	PAL-TYPE	5		5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	64	1.27 mm	75 °C (167 °F)	12 Dedicated Inputs, 8 I/O	12	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J28	1	4.572 mm	11.5062 mm	No	Register Preload; Power-Up Reset	e3	58.8 MHz	40 s	8	245 °C (473 °F)	11.5062 mm		8
PAL22V10Z-25CJTL	Texas Instruments	UV PLD	Commercial Extended	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.25 V	10	CMOS	22	PAL-TYPE	5	Tube	5 V	In-Line	DIP24,.3	Programmable Logic Devices	No	Macrocell	4.75 V	132	2.54 mm	75 °C (167 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	PAL with Macrocells; 10 Macrocells; 1 External Clock; Shared Input/Clock	e0	31.2 MHz		10		32.005 mm	No	10

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.