240 Programmable Logic Devices (PLD) 16

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

EPF81188ARC240-2

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1008

Yes

5.25 V

CMOS

184

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.75 V

.5 mm

70 °C (158 °F)

4 Dedicated Inputs, 184 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

417 MHz

180

220 °C (428 °F)

32 mm

184

EPF81188ARC240-3

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1008

Yes

5.25 V

CMOS

184

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.75 V

.5 mm

70 °C (158 °F)

4 Dedicated Inputs, 184 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

385 MHz

180

220 °C (428 °F)

32 mm

184

EPF81188ARC240-4

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1008

Yes

5.25 V

CMOS

184

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.75 V

.5 mm

70 °C (158 °F)

4 Dedicated Inputs, 184 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

357 MHz

180

220 °C (428 °F)

32 mm

184

EPF81500ARC240-2

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1.7 ns

1296

Yes

5.25 V

CMOS

181

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.75 V

.5 mm

70 °C (158 °F)

4 Dedicated Inputs, 181 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

417 MHz

177

220 °C (428 °F)

32 mm

181

EPF81500ARC240-3

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1296

Yes

5.25 V

CMOS

181

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.75 V

.5 mm

70 °C (158 °F)

4 Dedicated Inputs, 181 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

385 MHz

177

220 °C (428 °F)

32 mm

181

EPF81500ARI240-3

Altera

Loadable PLD

Industrial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

1.8 ns

1296

Yes

5.5 V

CMOS

181

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Registered

4.5 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 181 I/O

4

-40 °C (-40 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

385 MHz

177

220 °C (428 °F)

32 mm

181

EPF10K100BQC240-1

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

11 ns

4992

Yes

2.7 V

CMOS

189

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

QFP240,1.3SQ,20

Field Programmable Gate Arrays

Mixed

2.3 V

.5 mm

70 °C (158 °F)

189 I/O

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

4992 Logic Elements

e0

140 MHz

189

220 °C (428 °F)

32 mm

189

EPF10K100BQC240-2

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

12 ns

4992

Yes

2.7 V

CMOS

189

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

QFP240,1.3SQ,20

Field Programmable Gate Arrays

Mixed

2.3 V

.5 mm

70 °C (158 °F)

189 I/O

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

4992 Logic Elements

e0

140 MHz

189

220 °C (428 °F)

32 mm

189

EPF10K100BQC240-3

Altera

Loadable PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

14.5 ns

4992

Yes

2.7 V

CMOS

189

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

QFP240,1.3SQ,20

Field Programmable Gate Arrays

Mixed

2.3 V

.5 mm

70 °C (158 °F)

189 I/O

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

4992 Logic Elements

e0

140 MHz

189

220 °C (428 °F)

32 mm

189

EPM9400RC240-15

Altera

EE PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

16.2 ns

Yes

5.25 V

400

CMOS

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Programmable Logic Devices

Yes

Macrocell

4.75 V

.5 mm

70 °C (158 °F)

0 Dedicated Inputs, 159 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

4.1 mm

32 mm

No

580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V

e0

117.6 MHz

220 °C (428 °F)

32 mm

Yes

159

EPM9400RC240-20

Altera

EE PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

23.2 ns

Yes

5.25 V

400

CMOS

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Programmable Logic Devices

Yes

Macrocell

4.75 V

.5 mm

70 °C (158 °F)

0 Dedicated Inputs, 159 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

4.1 mm

32 mm

No

580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V

e0

100 MHz

220 °C (428 °F)

32 mm

Yes

159

EPM9480RC240-15

Altera

EE PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

16.4 ns

Yes

5.25 V

480

CMOS

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Programmable Logic Devices

Yes

Macrocell

4.75 V

.5 mm

70 °C (158 °F)

0 Dedicated Inputs, 175 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V

e0

117.6 MHz

220 °C (428 °F)

32 mm

Yes

175

EPM9480RC240-20

Altera

EE PLD

Commercial

Gull Wing

240

FQFP

Square

Plastic/Epoxy

23.4 ns

Yes

5.25 V

480

CMOS

5

3.3/5,5 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Programmable Logic Devices

Yes

Macrocell

4.75 V

.5 mm

70 °C (158 °F)

0 Dedicated Inputs, 175 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

4.1 mm

32 mm

No

676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V

e0

100 MHz

220 °C (428 °F)

32 mm

Yes

175

EP20K200RC240-2

Altera

Loadable PLD

Other

Gull Wing

240

FQFP

Square

Plastic/Epoxy

3 ns

8320

Yes

2.625 V

CMOS

168

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Macrocell

2.375 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 174 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

4.1 mm

32 mm

No

e0

168

220 °C (428 °F)

32 mm

174

EP20K200RC240-3

Altera

Loadable PLD

Other

Gull Wing

240

FQFP

Square

Plastic/Epoxy

3.6 ns

8320

Yes

2.625 V

CMOS

168

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

HQFP240,1.37SQ,20

Field Programmable Gate Arrays

Macrocell

2.375 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 174 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

e0

168

220 °C (428 °F)

32 mm

174

EP20K100QC240-3V

Altera

Loadable PLD

Other

Gull Wing

240

FQFP

Square

Plastic/Epoxy

3.6 ns

4160

Yes

2.625 V

CMOS

183

2.5

2.5,2.5/3.3 V

Flatpack, Fine Pitch

QFP240,1.3SQ,20

Field Programmable Gate Arrays

Macrocell

2.375 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 189 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G240

3

4.1 mm

32 mm

No

e0

183

220 °C (428 °F)

32 mm

189

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.